1. Field of the Invention
The present invention relates to a CD-ROM decoder for correcting code errors of the digital data which is read from a recording medium.
2. Description of the Related Art
In a conventional CD-ROM system used for a digital audio apparatus in which a compact disk (CD) is utilized as a read-only memory for digital data, the digital data read from the disk is subjected to dual correction processing in order to correct code errors of the data and to enhance the reliability of the data. The dual correction processing is composed of a first correction process executed by the reproducing unit and a second correction process executed by the CD-ROM decoder which is connected to the reproducing unit.
FIG. 5 is a block diagram of the structure of a CD-ROM system.
A pickup portion 1 for detecting the light projected onto and reflected from a compact disk reads the digital data written on a disk and serially outputs the digital data in accordance with a predetermined format.
A digital signal processor 2 processes the digital data which is input from the pickup portion 1 in accordance with a CD format, and supplies the thus-obtained CD-ROM data to a CD-ROM decoder 3.
The digital signal processor 2 has a compatibility with the CD system for a digital audio apparatus, and executes the demodulation of 14-bit digital data into 8-bit data, and the detection of an error of the code based on a Reed-Solomon code, etc.
At the same time, the digital signal processor 2 separates subcode data from the digital data which is input from the pickup portion 1 and inputs the subcode data into a control microcomputer 4 for controlling CD-ROM decoder 3.
One block of the CD-ROM data which is output from the digital signal processor 2 is composed of 24 bytes .times.98 frames =2352 bytes. To state this more concretely, 12 bytes are allotted to a synchronous idle, 4 bytes to a header, 2048 bytes to a user data, 4 bytes to an error detection code EDC, and 276 bytes to an error correction code ECC. In one block of the CD-ROM data, all the bytes except the 12 bytes of the synchronous idle, i.e., 2340 bytes are subjected to scrambling processing, and they are restored to the original data by descrambling processing at the time of reproduction.
The CD-ROM decoder 3 is composed of a DSP interface 5 for receiving the CD-ROM data from the digital signal processor 2, an error correcting portion 6 for detecting and correcting code errors of the CD-ROM data which are over-looked by the digital signal processor 2, and a host interface 7 for supplying the CD-ROM data to a host computer after the end of predetermined processing. The operation of each of these elements 5, 6 and 7 is controlled by the control microcomputer 4. The DSP interface 5 not only functions as an interface with respect to the digital signal processor 2, but also detects the synchronous idle of the CD-ROM data, creates a system clock for determining the operation timing of each element, restores the CD-ROM data to the original data by descrambling it and writes the restored CD-ROM data to a buffer RAM 8 which is connected to the CD-ROM decoder 3. The error correcting portion 6 fetches each block (98 frames) of the CD-ROM data which is written into the buffer RAM 8 by the DSP interface 5, corrects the data on the basis of the error detection code EDC and the error correction code ECC, and writes the correct data into the buffer RAM 8. The host interface 7 reads the CD-ROM data which is written into the buffer RAM 8 by the error correction portion 6 and supplies it to the host computer, and supplies various commands received from the host computer to the control microcomputer 4.
The control microcomputer 4 is composed of what is called a one-chip microcomputer containing a ROM and a RAM so as to control the operation of the CD-ROM decoder 3 in accordance with the control program stored in the ROM and temporarily store a command data which is input from the host computer through the host interface 7 and the subcode data which is input from the digital signal processor 2 separately from the CD-ROM data. Therefore, the control microcomputer 4 not only operates the CD-ROM decoder 3 in response to the instruction from the host computer, but also transfers the subcode data for every 98 frames in a predetermined format to the host interface 7 so that it is supplied to the host computer.
Since the control microcomputer 4 not only controls the operation of each element of the CD-ROM decoder 3 but also reads the subcode data, the jobs nearly reach the limit of the throughput of the control microcomputer 4. In addition, since it is difficult to increase the capacity of the RAM provided in the control microcomputer 4, the amount of data stored in the control microcomputer 4 is limited. It is therefore impossible to accommodate increasing subcode data and an increasing number of commands supplied from the host computer. In the case of applications such as CD graphics in which image data is dealt with as subcode data, since continuous processings of the subcode data are required, the load applied to the control microcomputer 4 increases.
In a conventional CD-ROM decoder, the three steps of writing the CD-ROM data read from the digital signal processor 2 into the buffer RAM 8, correcting code errors of the data, and transferring the corrected data to the host computer are generally executed in real time. For this reason, the operations of writing and reading new data into and from the buffer RAM 8 are constantly repeated, so that it is substantially difficult to store specific data in the buffer RAM 8 for a long period.
For example, a table-of-contents data which is called TOC is stored in the innermost periphery of a CD, and since the CD-ROM decoder 3 accesses the data by utilizing the TOC, it is desirable to constantly store the TOC in the CD-ROM decoder 3.